Recent questions tagged x86

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x86 - Constant reboot after setting up the Global Descriptor Table and protected mode

I must have done something wrong with the GDT setup and the switch to protected mode because it keeps constantly ... bin Where is my fault? See Question&Answers more detail:os...

asked Oct 17, 2021 in Technique[技术] by 深蓝 (71.8m points)

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x86 - How to know if an assembly code has particular syntax (emu8086, NASM, TASM, ...)?

I want to know how,by looking through a sample source code, recognise if the syntax used is em8086, TASM or ... know more about emu8086 please. See Question&Answers more detail:os...

asked Oct 17, 2021 in Technique[技术] by 深蓝 (71.8m points)

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x86 Assembly: Data in the Text Section

I don't quite understand how variables can be stored in the text section and how they can be manipulated. ... shellcode db '/bin/shJAAAAKKKK' See Question&Answers more detail:os...

asked Oct 17, 2021 in Technique[技术] by 深蓝 (71.8m points)

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x86 - Are load ops deallocated from the RS when they dispatch, complete or some other time?

On modern Intel1 x86, are load uops freed from the RS (Reservation Station) at the point they dispatch2, ... which seems unlikely but possible. See Question&Answers more detail:os...

asked Oct 17, 2021 in Technique[技术] by 深蓝 (71.8m points)

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x86 - lea assembly instruction

I Just want to make sure I am reading this right: movl 12(%ebp), %edx leal (%edx, %edx, 4), %eax I read ... Or the contents of the address by 4? See Question&Answers more detail:os...

asked Oct 17, 2021 in Technique[技术] by 深蓝 (71.8m points)

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x86 - Outputting integers in assembly on Linux

This needs to be done in pure assembly (ie. no libraries or calls to C). I understand the essence of ... be missing something here. Thoughts? See Question&Answers more detail:os...

asked Oct 17, 2021 in Technique[技术] by 深蓝 (71.8m points)

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x86 - developing for new instruction sets

Intel is set to release a new instruction set called AVX, which includes an extension of SSE to 256-bit ... the supporting CPU is released? See Question&Answers more detail:os...

asked Oct 17, 2021 in Technique[技术] by 深蓝 (71.8m points)

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x86 - how to interpret perf iTLB-loads,iTLB-load-misses

I have a test case to observe perf iTLB-loads,iTLB-load-misses by perf stat -e dTLB-loads,dTLB-load-misses, ... getattr(self._sock,name)(*args) See Question&Answers more detail:os...

asked Oct 17, 2021 in Technique[技术] by 深蓝 (71.8m points)

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x86 - CPU serial number

How do I obtain the serial number of the CPU in a PC? See Question&Answers more detail:os...

asked Oct 17, 2021 in Technique[技术] by 深蓝 (71.8m points)

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x86 - Why linux kernel use trap gate to handle divide_error exception?

In kernel 2.6.11.5, divide zero exception handler is set up as: set_trap_gate(0,&divide_error); According to " ... the division by 0 trap code. See Question&Answers more detail:os...

asked Oct 17, 2021 in Technique[技术] by 深蓝 (71.8m points)

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x86 - What does X mean in EAX,EBX,ECX ... in assembly?

Google doesn't show the result, Anyone knows? See Question&Answers more detail:os...

asked Oct 17, 2021 in Technique[技术] by 深蓝 (71.8m points)

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x86 - Converting 32-bit Application Into 64-bit Application in C

I am presently working on converting a 32-bit application into a 64-bit application in C. This ... while converting the application. See Question&Answers more detail:os...

asked Oct 17, 2021 in Technique[技术] by 深蓝 (71.8m points)

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x86 - Why doesn't Linux use the hardware context switch via the TSS?

I read the following statement: The x86 architecture includes a specific segment type called the Task State Segment (TSS), ... look at it. 8^) See Question&Answers more detail:os...

asked Oct 17, 2021 in Technique[技术] by 深蓝 (71.8m points)

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x86 - CPU Privilege Rings: Why rings 1 and 2 aren't used?

A couple of questions regarding the x86 CPU privilege rings: Why aren't rings 1 and 2 used by most operating ... Or are they completely unused? See Question&Answers more detail:os...

asked Oct 17, 2021 in Technique[技术] by 深蓝 (71.8m points)

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x86 - Convert _mm_shuffle_epi32 to C expression for the permutation?

I'm working on a port of SSE2 to NEON. The port is early stage and it's producing incorrect results. ... s unrolled into basic C statements? See Question&Answers more detail:os...

asked Oct 17, 2021 in Technique[技术] by 深蓝 (71.8m points)

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x86 - i386 vs. AMD64 ABI Differences

Where can I find all the differences in data types between the i386 & AMD64 Application Binary Interface(ABI)s ? ... in AMD64. Is this correct? See Question&Answers more detail:os...

asked Oct 17, 2021 in Technique[技术] by 深蓝 (71.8m points)

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x86 - Can the simple decoders in recent Intel microarchitectures handle all 1-µop instructions?

The front end of recent Intel CPUs contains one complex decoder and a number of simple decoders. The complex ... by the complex decoder? See Question&Answers more detail:os...

asked Oct 17, 2021 in Technique[技术] by 深蓝 (71.8m points)

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x86 - How does the jmp instruction work in att assembly in this instance

I am stepping through a function in AT&T assembly right now and can't figure out how this specific jmp command ... jmp used this way before. See Question&Answers more detail:os...

asked Oct 17, 2021 in Technique[技术] by 深蓝 (71.8m points)

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x86 Assembly - Why is [e]bx preserved in calling conventions?

I've noticed that a lot of calling conventions insist that [e]bx be preserved for the callee. Now, I can ... single out [e]bx for preservation. See Question&Answers more detail:os...

asked Oct 17, 2021 in Technique[技术] by 深蓝 (71.8m points)

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x86 - Is there hardware support for 128bit integers in modern processors?

Do we still need to emulate 128bit integers in software, or is there hardware support for them in your average desktop processor these days? See Question&Answers more detail:os...

asked Oct 17, 2021 in Technique[技术] by 深蓝 (71.8m points)

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x86 - How do the store buffer and Line Fill Buffer interact with each other?

I was reading the MDS attack paper RIDL: Rogue In-Flight Data Load. They discuss how the Line Fill Buffer ... events correct in my description? See Question&Answers more detail:os...

asked Oct 17, 2021 in Technique[技术] by 深蓝 (71.8m points)

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x86 - Counting machine instructions using gdb

I need to estimate the exact starting location of some hotspot in a program, in terms of x86 machine instruction ... another way to do this? See Question&Answers more detail:os...

asked Oct 17, 2021 in Technique[技术] by 深蓝 (71.8m points)

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x86 64 - What specifically marks an x86 cache line as dirty - any write, or is an explicit change required?

This question is specifically aimed at modern x86-64 cache coherent architectures - I appreciate the answer can be ... 17/rip-zero-opt.html See Question&Answers more detail:os...

asked Oct 17, 2021 in Technique[技术] by 深蓝 (71.8m points)

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x86 - What is the difference between Trap and Interrupt?

What is the difference between Trap and Interrupt? If the terminology is different for different systems, then what do they mean on x86? See Question&Answers more detail:os...

asked Oct 17, 2021 in Technique[技术] by 深蓝 (71.8m points)

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x86 - Converting bin to hex in assembly

I'm beginner and I need help with converting 16-bit binary number to hex. I have done most of the code ... End of assembly with entry-procedure See Question&Answers more detail:os...

asked Oct 17, 2021 in Technique[技术] by 深蓝 (71.8m points)

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x86 - Convention for displaying vector registers

Is there a convention for displaying/writing large registers, like those available in the Intel AVX instruction ... in commodity SIMD hardware. See Question&Answers more detail:os...

asked Oct 17, 2021 in Technique[技术] by 深蓝 (71.8m points)

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x86 - What's difference between number with $ or without $ symbol in at&t assembly syntax?

Let's say .data section has following item: 0x1234 00010203 04050607 08090a0b 0c0d0e0f 0x1238 10000000 And in ... between two instruction? See Question&Answers more detail:os...

asked Oct 17, 2021 in Technique[技术] by 深蓝 (71.8m points)

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x86 64 - Understanding %rip register in intel assembly

Concerning the following small code, which was illustrated in another post about the size of structure and all the ... I use move instructions. See Question&Answers more detail:os...

asked Oct 17, 2021 in Technique[技术] by 深蓝 (71.8m points)

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