x86 - Reset vector in 386+ processors

Question

The wikipedia page for Reset vector says (for 386+ processors):

The value of the selector portion of the CS register at reset is F000h, the value of the base portion of the CS register is FFFF0000h, and the value of the IP register at reset is FFF0h to form the segmented address FFFFF000h:FFF0h in real mode.

All my reading on computer boot up has said that the processor starts in real mode, and hence "selectors" should not come into picture. Then why the mention here ? Also, what is the "base portion" being referred to here, and in which register is it stored ? Basically, I don't understand how the reset vector is set differently for 386 processors versus the previous ones.

Answer 1

The address that needs to be accessed is the last 16 bytes of memory as that is where the reset vector is stored.

The reason that the values for CS are different is because of the differences between 8086/80186 and 80286+ processors. On the 80286 processors and above, there exists a Global Descriptor Table (GDT) which specifies how memory is accessed and utilized on the system. The 8086 did not have a GDT and thus memory access was essentially fixed. Even in real mode on a 286+ there exists GDT entries.

The base and selector values you refer to are just the base and selector portions of a GDT entry.

Therefore, the reset vector is set differently due to the fact that GDT entries exist and have effects on 286+ processors in all processor modes. On a freshly booted system, the following segment:offset values are used:

8086/80186 (16-bit):             0xFFFF:0x0000
80286      (16-bit):             0xF000:0xFFF0
80386+     (32-bit):         0xFFFFF000:0xFFF0
           (64-bit): 0xFFFFFFFFFFFFF000:0xFFF0

Essentially, on 80286 and higher processors the offset and segment values are the same except for the segment value being sign-extended on 32 and 64 bit processors.